Semiconductors Newsletter - COE Chakra
Semiconductors Newsletter
The Chip Adventure
January,2026
Jagadish Kumar P Soman, Semiconductor team, SBI CHAKRA
Hello there! I'm Chip, the tiny electronic brain that runs your smartphone, your computer, and every digital gadget you use. Officially, they call me a semiconductor or an integrated circuit. My story is one of getting smaller and smarter. My ancestors were bulky glass switches called vacuum tubes, which were too slow and unreliable. Scientists looked for a better switch and found that materials like Germanium and Silicon could sometimes conduct electricity and sometimes block it—hence, the name semiconductor. My entire existence is built on tiny electronic switches called transistors. My job is simple: I only know two numbers: 1 (ON) and 0 (OFF). I process, remember, and convert real-world sensations like a touch, sound and images into these vast strings of binary digits. Every complex task, from sending a message to running massive AI workloads, is merely a vast, organized stream of these 1s and 0s.
Early Developments.
The journey began in 1947 when John Bardeen, Walter Brattain, and William Shockley designed the first transistor at Bell Labs, New Jersey, USA. Then, in 1958, Jack Kilby had the revolutionary idea to put all the parts onto a single slab, resulting in my present avatar, the "integrated circuit". My first version only had four transistors. Soon after, Bob Noyce perfected the "planar method" to build all those switches perfectly flat onto the silicon. Subsequent generations of engineers developed various standard methods to build me. One of the most fundamental and essential of these methods, which is now the standard way to build modern digital chips, is known as Complementary Metal Oxide Semiconductor (CMOS). My newest versions, using 2nm/3nm technology, can house billions of transistors. When I was first invented, I was very expensive, but the US administration needed me desperately for their Cold War- Space Race missions because I was much more reliable than the existing devices. My first big job was amazing: I guided the Apollo program's guidance computer all the way to the Moon. I also helped the Minuteman II missile perform twice the calculations with half the weight. Later, in the Gulf War, my ability to guide weapons was celebrated as the "triumph of silicon over steel".
Moore’s Law and Miniaturization
My destiny was sealed in 1965 when Gordon Moore observed that the number of transistors that could fit on me would double every two years. This shrinking caused the cost of processing information to drop drastically. To keep shrinking, my switches evolved from flat designs (like the planar switches used in the 1960s and 1970s) to the 3D structure FinFET (Fin Field Effect Transistor, like a fish fin). Now, the newest chips use the Gate-All-Around (GAA) Transistor Architecture. We measure my tiny features in nanometres (a billionth of a meter). My tiniest features are 10,000 times smaller than a human hair (50mm) and even smaller than one tenth the size of a coronavirus (100nm). To lower my cost, the silicon wafers (on which I am fabricated) have grown to the size of 300mm in diameter. This means more chips can be manufactured on a single wafer, which helps in reducing my cost.
My specialised use-case
For niche power electronics applications like Automotive Advanced Driver Assistance System (ADAS), I am made using wide band gap semiconductors like Silicon Carbide (SiC), Gallium Nitride (GaN), and Gallium Arsenide (GaAs) — these material help me handle very high frequency, high power, heat and voltage without breaking down.
Fabrication: The Complex Process
- Making me is the most complex industrial process in the world, requiring nanometer-level precision.
- The process starts with ultra-purified Silicon (Si) wafer. The silicon-rich sand is melted (at over 1,400°C) and purified to 99.99999999999% (eleven 9s!) purity using the Siemens method.
- The Si crystal ingot is grown using the Czochralski method, then sliced into wafers. My circuits are built in a modern, fully automated, ultra-clean factory called a Fab, which costs between $10 billion(legacy chips)- $30 billion(advanced chips).
- The Fab is more than a hundred times cleaner than a hospital operating room and requires ultra-pure water and uninterrupted power. Workers must wear special "bunny suits" to prevent contamination from hair, skin, or dust.
- My fabrication process requires over 1,000 sequential steps and is often compared to baking a complex cake with about 75 delicate layers. Usually time taken is approximately 12 weeks.
- The fabrication process involves printing patterns (photolithography), carving (etching), adding elements (implantation), connecting layers (coating) and metallization.
- The key step is called photolithography, which is like printing my circuits using light shone through patterned masks. My advanced features need specialized light created by the Extreme Ultraviolet (EUV) lithography machine.
- This amazing tool, presently made only by one Dutch company, Advanced Semiconductor Materials Lithography (ASML), explodes a tiny ball of tin into a plasma 40 times hotter than the surface of the sun to create the precise EUV light needed.
Global Supply Chain and Business Model
The world leader in making me is the Taiwan Semiconductor Manufacturing Company (TSMC) in Taiwan. Its founder, Morris Chang, had a genius idea: the "Pure Play Foundry". This meant TSMC would focus only on manufacturing chips, letting new "fabless" companies (like Apple and Nvidia) focus just on designing them. This differed from the Integrated Device Manufacturer (IDM) model used by Intel and Samsung, where they handle designing, manufacturing, and packaging themselves. Today, TSMC makes most of the world’s most advanced processor chips. Once printed on the wafer, I am cut into individual pieces, put in a protective casing, and tested—this is the Outsourced Semiconductor Assembly and Test (OSAT) Phase. This labour-intensive work quickly shifted overseas from the US in the 1960s to places like Hong Kong, Taiwan, and Southeast Asian countries such as Malaysia and the Philippines, as the companies chased cheap labour.
Geopolitical Competition and Strategic Importance
My strategic importance was recognized during my early days itself. Many nations tried to replicate the Fab: The Soviet Union tried unsuccessfully, Japan dominated the memory segment in the 1980s, and China still pours billions into its industry with minimal success in advanced nodes. This competition triggered a global subsidy race, leading to the US CHIPS and Science Act, the European Chips Act, China’s Big fund, and others. Financing Fabs is a high-risk adventure because the industry is highly cyclical in nature. Furthermore, Fab has long gestation periods (a minimum of five years), yield stabilization challenges, and heavy dependence on skilled engineers, which makes producing me a tricky adventure.
India's Ambition
India is now determined to join my story with a massive Rs 76,000 Crore committed under the India Semiconductor Mission (ISM). India is already a design superpower (with nearly 20% of the world's design workforce) and is focusing on making reliable "workhorse chips" (like the 28nm through the proposed TATA Fab) needed for the Automotive and Consumer electronics sectors. However, this requires bringing my entire ecosystem to India, which is a herculean task that ISM phase 2 has undertaken. In recognition of my global stature, in Semicon India 2025 event conducted at Delhi on 2-4 September, I was awarded the title of "Digital Diamonds" by the honourable Prime Minister of India.
The Future Market and Growth Drivers
As per Gartner forecast, the global market is racing toward $1.5 trillion by end of 2027, and India’s consumption is projected to reach $100-$110 billion by 2030 as per Ministry of Electronics and Information Technology (MeitY). There is approximately $190+ billion of government funding initiatives in the pipeline worldwide. Further my demand boom is driven by: (1) AI/GenAI: Driving demand for specialized processors called Application Specific Integrated Circuits (ASICs); (2) Advanced Packaging: Stacking chips vertically (3D stacking) and integrating High Bandwidth Memory (HBM) to move data quickly (3) Compound Semiconductors. My journey is far from over and the future looks bright. Further, I am looking forward to being Made in India, thereby taking India one step closer to the realisation of the Viksit Bharat dream.
*Data updated as on May, 2026
Semiconductors Sectoral Insights
India’s semiconductor industry is at an inflection point. Global supply chain realignment, rising domestic electronics demand, and active government support have created a rare opportunity for the country to emerge as a strategic hub in the global ecosystem. India is building capabilities across design, outsourced assembly and testing, packaging, and selected component manufacturing, though wafer fabrication and advanced foundries remain significant gaps.
Semiconductors underpin every sector of the digital economy. They are grouped into logic, memory, analog, optoelectronics, and discrete devices. Logic chips manage computing, memory supports data storage, and analog converts real-world signals into digital inputs. Furthermore, compound semiconductors such as silicon carbide (SiC), gallium nitride (GaN), and gallium arsenide (GaAs) are gaining prominence in high-frequency and high-power applications. These products serve a wide range of uses, from consumer electronics, mobiles, and PCs to rapidly expanding markets in automotive systems, telecom infrastructure, industrial automation, renewable energy, and artificial intelligence in data centres. Emerging fields such as real-time edge computing, machine vision, and quantum technologies are pushing the boundaries of semiconductor demand.
The semiconductor value chain covers equipment and raw materials, EDA tools, fabless design firms, foundries, integrated device manufacturers, OSAT providers, and device integrators. Value creation is concentrated in foundries and fabless firms in advanced logic, while OSAT players handle packaging and testing. Given the scale of capital requirements, India has prioritized wafer fabrication, OSAT, and component manufacturing as focus areas. Domestic consumption is projected to reach USD 110 billion by 2030, growing at a nearly 20% CAGR, supported by four main drivers: India’s position as one of the largest global smartphone and 5G markets, rising semiconductor content per vehicle with EV penetration, accelerating demand from cloud and data localization, and the spread of IoT across industrial and household applications. Alongside these drivers, technology is shifting toward heterogeneous computing, chiplet-based integration, energy-efficient architectures, and AI-specific semiconductors.
Meeting this demand requires bridging significant gaps in manufacturing. Semiconductor fabrication is among the most complex and capital-intensive processes in the global economy, demanding nanometer-level precision, ultra-clean environments, and resilient infrastructure. Each node shrink, for example from 7nm to 5nm, requires exponentially higher R&D and capex, with fab construction now exceeding USD 15 billion. India’s planned fabs are focused on 28nm and above, targeting automotive, industrial, and defense applications. However, barriers remain, including a lack of indigenous process IP, limited advanced-node demand, and shortages of skilled fab operators.
The policy environment has become central to driving investment. The Semicon India Program, with a subsidy pool of INR 76,000 crore, combined with PLI and DLI schemes, is designed to attract global players and nurture domestic startups. Several states including Gujarat, Karnataka, Tamil Nadu, and Uttar Pradesh have introduced their own semiconductor policies, offering land, tax breaks, power incentives, and infrastructure support. India’s broader opportunity rests on structural tailwinds: multinational firms diversifying beyond China, India’s strength in design talent which already accounts for 20% of the global chip design workforce, fast-growing domestic demand projected above USD 100 billion by 2030, and rising confidence from global capital commitments, such as those from Powerchip Semiconductor Manufacturing Corporation (PSMC) and Micron.
At the same time, risks are significant. These include high capital requirements of USD 5–15 billion per advanced fab, long ramp-up timelines, yield stabilization challenges, geopolitical trade restrictions, shortages of skilled engineers, and dependence on foreign IP and EDA tools.
In summary, India has a narrow but strategic window to establish itself in the global semiconductor ecosystem. Success will depend on disciplined execution, the mobilization of sustainable financing, closing capability gaps in fabs and components, and embedding ESG practices from the outset. With strong policy momentum, growing investor interest, and rising domestic demand, India is positioned to play a meaningful role in the next phase of global semiconductor growth.
Access Detailed Sectoral Insight Reports
Last Updated On : Saturday, 30-05-2026
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